Freescale Semiconductor /MK21F12 /RTC /RAR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RAR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TSRR 0 (0)TPRR 0 (0)TARR 0 (0)TCRR 0 (0)CRR 0 (0)SRR 0 (0)LRR 0 (0)IERR 0 (0)TTSR 0 (0)MERR 0 (0)MCLR 0 (0)MCHR

TPRR=0, MERR=0, IERR=0, MCHR=0, TARR=0, LRR=0, MCLR=0, TCRR=0, SRR=0, CRR=0, TSRR=0, TTSR=0

Description

RTC Read Access Register

Fields

TSRR

Time Seconds Register Read

0 (0): Reads to the Time Seconds Register are ignored.

1 (1): Reads to the Time Seconds Register complete as normal.

TPRR

Time Prescaler Register Read

0 (0): Reads to the Time Pprescaler Register are ignored.

1 (1): Reads to the Time Prescaler Register complete as normal.

TARR

Time Alarm Register Read

0 (0): Reads to the Time Alarm Register are ignored.

1 (1): Reads to the Time Alarm Register complete as normal.

TCRR

Time Compensation Register Read

0 (0): Reads to the Time Compensation Register are ignored.

1 (1): Reads to the Time Compensation Register complete as normal.

CRR

Control Register Read

0 (0): Reads to the Control Register are ignored.

1 (1): Reads to the Control Register complete as normal.

SRR

Status Register Read

0 (0): Reads to the Status Register are ignored.

1 (1): Reads to the Status Register complete as normal.

LRR

Lock Register Read

0 (0): Reads to the Lock Register are ignored.

1 (1): Reads to the Lock Register complete as normal.

IERR

Interrupt Enable Register Read

0 (0): Reads to the Interrupt Enable Register are ignored.

1 (1): Reads to the Interrupt Enable Register complete as normal.

TTSR

Tamper Time Seconds Read

0 (0): Reads to the Tamper Time Seconds Register are ignored.

1 (1): Reads to the Tamper Time Seconds Register complete as normal.

MERR

Monotonic Enable Register Read

0 (0): Reads to the Monotonic Enable Register are ignored.

1 (1): Reads to the Monotonic Enable Register complete as normal.

MCLR

Monotonic Counter Low Read

0 (0): Reads to the Monotonic Counter Low Register are ignored.

1 (1): Reads to the Monotonic Counter Low Register complete as normal.

MCHR

Monotonic Counter High Read

0 (0): Reads to the Monotonic Counter High Register are ignored.

1 (1): Reads to the Monotonic Counter High Register complete as normal.

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